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TI's first low-noise buck converter with integrated ferrite bead compensation simplifies high-precision design

  • Author:TI
  • Release on:2021-01-06
With TI's low-noise, low-ripple buck converter, engineers can achieve efficient operation in noise-sensitive applications

Beijing, October 22, 2020 - Texas Instruments (TI) recently launched a new series of low-noise DC/DC switching regulators with integrated ferrite bead compensation. TPS62912 and TPS62913 have 20 µV in the frequency range of 100 Hz to 100 kHzRMSLow noise, and 10 µVRMSThe ultra-low output voltage ripple enables engineers to eliminate one or more low-dropout regulators (LDO) in their designs, reducing power consumption by up to 76% and saving 36% of board space. For detailed information, please refer towww.ti.com/TPS62912-pr withwww.ti.com/TPS62913-pr.

In many high-precision test and measurement, medical, aerospace and defense, and wireless infrastructure applications, power supply noise is a key design challenge. The traditional low-noise power supply architecture includes a DC/DC converter; a low-noise LDO, such asTPS7A52,TPS7A53 or TPS7A54; And an off-chip filter, such as ferrite beads. By integrating ferrite bead compensation, TPS62912 and TPS62913 use ferrite beads that exist in most systems as effective filters to resist high-frequency noise, thereby reducing the power supply output voltage ripple by about 30 dB and simplifying Power supply design. If you want to understand the working principle of low noise buck converter, please read the technical article "Use a low noise buck converter to reduce noise and ripple to a lower level. "

From November 9th to 12th, 2020, TI will display TPS62913 online at its virtual booth at the Munich Electronics Show in Germany. For more information, please visithttps://www.ti.com/about-ti/trade-shows/electronica.html.

Easily reduce power supply noise

High-precision systems require power rails with low noise and low ripple to maintain signal accuracy and integrity. TPS62912 and TPS62913 both meet these two requirements, and have a power supply rejection ratio of 65 dB at frequencies up to 100 kHz. In addition, the output voltage error of the step-down converter series is less than 1%, which helps to ensure strict output voltage accuracy. Both converters can use spread spectrum frequency modulation to further attenuate RF spurs and allow synchronization with an external clock, so engineers can easily meet their signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) goals. It is essential for applications like medical imaging or radar.

Maximize efficiency while reducing power consumption

Engineers have historically faced a trade-off between noise and efficiency when powering sensitive analog circuits. Using a switching regulator alone will cause excessive switching noise, and adding a post-regulator LDO to reduce noise will cause additional power consumption, especially at high load currents. The peak efficiency of TPS62912 and TPS62913 is as high as 97%, enabling engineers to design noise filtering without LDO, reducing power consumption by 76% - The analog front end (AFE) is designed to be 1.8 W.ADC12DJ5200RFThe design of the equal-bandwidth analog-digital converter (ADC) is 1.5W. This means that compared with the traditional low-noise power supply architecture, the efficiency is increased by 20% and 15%, respectively. Read the application manual"Use TPS62913 low ripple and low noise buck converter to power noise sensitive ADC",to know more information.

Save board space and overall system cost

By using TPS62912 or TPS62913 in the design, engineers can not only eliminate linear regulators, but also related passive components, which can save about 20mm per LDO2The printed circuit board (PCB) area. Generally, a design using a single LDO can save 36% of PCB space. In addition, the integrated ferrite bead compensation function of the buck converter can help engineers reduce the overall number of DC/DC components and eliminate two capacitors and two resistors from their design to further reduce overall system cost and shorten design time.